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Let s examine the simplest type of DMA request involving a one-shot transfer to or from a single, physically contiguous memory region In this case, the DMA channel is supplied with information on the transfer source and destination (each being either a physical memory address or a peripheral identi er), together with the number of bytes to transfer The request is initiated and the controller interrupts the processor once either the transfer completes successfully, or an error occurs DMA controllers often provide support for data to be transferred as a continuous stream as well as a one-shot transfer This requires more than one set of transfer registers for each channel, allowing a double-buffer scheme to be employed While the controller is transferring data using one set of registers, the software can simultaneously be programming the second set ready for the next transfer.

When you test that code, you ll see the following output:

As soon as the rst transfer completes, the controller moves on to process the second one, without interrupting data ow At the same time the controller signals the end of the rst transfer with an interrupt, which signals the software to begin preparing the third and so on Some DMA controllers support scatter-gather mode This allows a DMA channel to transfer data to and from a number of memory locations.

You can t have too much dynamic random access memory or too much GHz in a processor. (That will be 2 cents for the advice.)

that aren t contiguous, all as a single request. The control software has to supply information to the DMA controller, describing the transfer as a linked list of data structures, each specifying part of the transfer. These data structures are known as descriptors. (Not to be confused with the same term widely used in Symbian OS to refer to the family of TDesC derived classes!) The DMA controller acts on each descriptor in turn, and only interrupts the processor at the end of the descriptor chain. Some controllers allow the descriptor chain to be extended while transfer is in progress another way to facilitate uninterrupted data transfer. Figure 13.1 shows a setup for scatter-gather DMA transfer from two disjoint blocks of memory into a peripheral.

Source Address Dest. Address Transfer length Next descriptor System Memory Source Address Dest. Address Transfer length Descriptor pool End of list mark

Constants are like variables in PHP except they do not change in value. They re assigned values in a much different way than variables are, and they re case-sensitive. By convention (and good practice), they re in all caps (LIKE_THIS). The basic assignment format is:

The scatter-gather list contains two linked descriptors each providing information on one of the blocks. This list is supplied by the control software, which also loads a descriptor address register in the DMA controller with the address of the rst descriptor. The actual descriptor format is generally hardware dependent and often more complex than that shown in the diagram. For example, it may contain information on the addressing mode for the source and destination addresses. For each channel that involves peripheral-related DMA transfer, the controller normally has to be programmed with information on the burst size and port width of the peripheral. Burst size is the amount of data that

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define( CONSTANT_NAME , value );

has to be transferred to service each individual DMA request from the peripheral device. Many peripherals employ a FIFO buffer and for these, the burst size depends on the size of the FIFO and the threshold level within the FIFO that triggers a DMA request from it (for example, FIFO half-empty or quarter-empty). The port width speci es the granularity of data transfer (for example, byte, half-word and so on).